Embedded Memory Design for Multi-Core and Systems on Chip
(Sprache: Englisch)
This book describes the various tradeoffs systems designers face when designing embedded memory. It uses real product examples to demonstrate embedded memory design flow from architecture, to circuit design, design for test and yield analysis.
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This book describes the various tradeoffs systems designers face when designing embedded memory. It uses real product examples to demonstrate embedded memory design flow from architecture, to circuit design, design for test and yield analysis.
Klappentext zu „Embedded Memory Design for Multi-Core and Systems on Chip “
This book describes the various tradeoffs systems designers face when designing embedded memory. Readers designing multi-core systems and systems on chip will benefit from the discussion of different topics from memory architecture, array organization, circuit design techniques and design for test. The presentation enables a multi-disciplinary approach to chip design, which bridges the gap between the architecture level and circuit level, in order to address yield, reliability and power-related issues for embedded memory.
Inhaltsverzeichnis zu „Embedded Memory Design for Multi-Core and Systems on Chip “
Introduction.- Cache Architecture and Main Blocks.- Embedded Memory Hierarchy.- SRAM Memory Operation and Yield.- Low Power and High Yield SRAM Memory.- Leakage Reduction.- Embedded Memory Verification.- Embedded Memory Design Validation and Design For Test.- Emerging Memory Technology Opportunities and Challenges.
Bibliographische Angaben
- Autor: Baker Mohammad
- 2016, Softcover reprint of the original 1st ed. 2014, XIII, 95 Seiten, 37 farbige Abbildungen, Maße: 15,6 x 23,6 cm, Kartoniert (TB), Englisch
- Verlag: Springer, Berlin
- ISBN-10: 1493948016
- ISBN-13: 9781493948017
Sprache:
Englisch
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