Proceedings of the International Conference on Nano-electronics, Circuits & Communication Systems

1. An Autonomous Power and Clock Gating Technique in SRAM Based FPGA.- 2. A Hardware Implementation of Evolvable Embedded System for Combinational Logic Circuits using Virtex 6 FPGA.- 3. Evaluation of Wavelet Based Speech CODEC for VOIP Applications.- 4. User Demand Wireless Network Selection using Game theory.- 5. Leakage Reduction by Test Pattern Reordering.- 6. Review on Band-Notching Techniques for Ultra Wideband Antenna.- 7. Real Time Simulation Design for Continuous Process Industries.- 8. Performance Enhancement of Lte Hetnet using Evm Based Constellation Combiner (ECC) in Warp.- 9. Performance Analysis of 3-Phase induction Motor: using Simulink and Tms320C6713.- 10. A Distributed Fault-Tolerant Multiobjective Clustering Algorithm for Wireless Sensor Networks.- 11. Comparing Energy Efficiency of DF Relay Assisted Cooperative and Non-Cooperative Short Range Wireless Systems.- 12. Modified Pso Based Equalizers for Channel Equalization.- 13. Investigation of Electrostatic Actuation Scheme for Low Voltage Mems Switch.- 14. On online Counting of Cigarette in Packets - An Image Processing Approach.- 15. Fuzzy Min Max Neural Network Based intrusion Detection System.- 16. Effect of Static Synchronous Series Compensator on Power Balancing in Wind Farms.- 17. Charaterisation of TFT Sensors for Chemical Sensing Applications.- 18. Implementation of Breadth First Search for Storage Optimization in Random Storage Assignment of Automated Storage and Retrieval Systems.- 19. Design Analysis of Dual Band Octagonal Shape Microstrip Patch Antenna at 5.70 and 8.00 Ghz.- 20. Design of A High Performance CMPS Charge Pump for Phase-Locked Loop Synthesizers.- 21. Efficient Algorithms for Removal of High Density Random Value Impulse Noises in Images.- 22. Reliability and Energy Benefit Analysis of Distribution System incorporating Wind Turbine Generator.- 23. Present Context of Smart Grids in India: A

Dr. Vijay Nath received his bachelor's degree in Physics and master's degree in Electronics from DDU Gorakhpur University, India in 1998 and 2001. He received a PGDCN from MMM Engineering College Gorakhpur (Gold Medalist) in 1999. He received his Ph.D. in VLSI Design & Technology from Dr. RML Avadh University, Faizabad in association with CEERI- Pilani in 2008. He was a member of the faculty of the Department of Electronics, DDU Gorakhpur University, Gorakhpur (2002-2006). In 2006, he joined as a faculty member in the Department of Electronics and Communication Engineering, Birla Institute of Technology Mesra, Ranchi, India. Currently he is Professor In-charge of VLSI Design Lab & Embedded System Design Lab, Dept. of ECE, BIT Mesra, Ranchi. His research interests include analog, digital, mixed CMOS VLSI circuits, low power VLSI circuits, ADC, DAC, PTAT, CMOS bandgap voltage reference, piezoresistive pressure sensors, double ring capacitive pressure sensors, MEMS sensors, signal-processing circuits, ASICs, embedded systems designs, smart cardiac pacemaker, and early stage cancer detection. He has to his credit around 100 publications in international journals and conferences. He is a member of several reputed professional and academic bodies including IETE, ISVE, and IEEE.